The Versal Premium Gen 2 is AMD's latest Field Programmable Gate Array (FPGA)-based adaptable computing solution, enabling users to move data more rapidly and efficiently between processors and accelerators.
AMD also claims the newly unveiled Versal unit is the industry’s first FPGA device featuring the Compute Express Link (CXL) 3.1 interconnect standard, enabling operators to scale and optimise workloads with greater flexibility and efficiency to support AI-driven applications, cloud services, and 5G network demands.
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“System architects are constantly looking to pack more data into smaller spaces and move data more efficiently between parts of the system,” said Salil Raje, SVP and general manager of the adaptive and embedded computing Group at AMD.
The new Versal unit is also among the industry’s first FPGA devices featuring support for PCIe Gen6 for ultra-fast data transfer and LPDDR5X memory support for high bandwidth and power efficiency.
PCIe Gen6 offers a two to four times faster line rate compared to rival FPGAs, AMD suggests. Combined with CXL 3.1 support, the Versal Premium Gen 2’s features allow operators using the Versal Premiums to handle more data with faster processing speeds and greater memory capacity.
The hardware can support data transfer speeds of up to 8533 megabytes per second (MB/s).
AMD’s announcement suggests that users who pair the new FPGAs with its recently unveiled EPYC CPUs will enable users to “accelerate data-intensive applications and meet rapid data growth demands.
“Our latest addition to the Versal Gen 2 portfolio helps customers improve overall system throughput and utilisation of memory resources to achieve the highest performance and unlock insights for their most demanding applications from the cloud to the edge,” Raje added.
Development tools for AMD’s new Versal units are expected to be available in Q2 2025, with silicon samples available by early 2026. Production shipments are expected to begin in the second half of 2026.
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